Saturday, November 05, 2005

SimPRES

SimPRES

SimPRES
A Simulator for time Petri nets


PRES+ stands for Petri net Representation for Embedded Systems. It is a model intended to represent embedded systems, which extends Petri nets adding data and real-time information to tokens, and associating functions and delays to transitions. Delays may be expressed as lower and upper limits.

SimPRES is a simulator for a subset of this particular computational model. The class of systems that may be validated using SimPRES corresponds to time Petri nets.

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